1. Field of the Invention
The present invention relates to testing system designs. More specifically, the present invention relates to a method and an apparatus to facilitate generating simulation modules for testing system designs.
2. Related Art
Designing and implementing a large system such as a modern integrated circuit device typically involves testing at many stages during development. To be effective, this testing examines a snapshot of the entire system so that a test engineer can evaluate the operation of the various components or modules within the system, and the interactions of these modules with each other and with the external interface.
The many designers involved in creating the modules take different amounts of time to complete the modules because of the differences in the complexity of the individual modules. It is, therefore, difficult to create a snapshot of the system until all of the components have been completed and the maturity rules, such as using only permissible gates, have been met.
Testing a system prior to the completion of all modules can involve creating higher-level representations of immature or missing modules that simulate the responses of these nonfunctioning modules. Creating these higher-level representations of simulation modules is a time-consuming manual process.
In this manual process, a test engineer must first identify the nonfunctioning modules within the system. Next, the test engineer typically determines the interfacesxe2x80x94the inputs, outputs, and intermodule communicationsxe2x80x94to the nonfunctioning module. After determining these interfaces, the test engineer creates a substitute or simulation module, which exhibits the identical responses as the module being replaced when the simulation module is supplied with an input stimulus. While simulation modules are effective for making a testable system, the time and resources expended in creating these simulation modules is a significant burden on the designers.
What is needed is a method and an apparatus to facilitate generating simulation modules for testing system designs without the problems described above.
One embodiment of the present invention provides a method that facilitates generating a simulation module for testing a system design. The method operates by receiving a system specification, which specifies correct behavior for modules within the system design. The method also receives modules that are individually designed to this system specification. The method then compares the modules with the system specification to identify nonfunctioning modules that can include either missing modules or incorrect modules. The method also determines an interface for the nonfunctioning modules from the system specification, which specifies input and output requirements for these nonfunctioning modules. The method then generates the simulation module. This simulation module can function in place of the nonfunctioning module and can simulate a functionality assigned to the nonfunctioning module.
In one embodiment of the present invention, the development is in two or more specification languages. In this case, the simulation module is written in a specification language that is different from the original description so that the compilation stage can be passed. Examples of different specification languages include VHDL and Verilog for circuit design and C and C++ for software design.
In one embodiment of the present invention, the design is partitioned into multiple blocks, each block being assigned to a different processor for compilation. Typically, the processors are fully compatible, however, if this is not the case, the system generates adaptors and correct scheduling for each binary object that will be interacting during the simulation phase.
In one embodiment of the present invention, the method receives a list of test vectors. The method applies this list of test vectors to the system specification, and captures the response of the system specification to this list of test vectors. The method simulates the response to the list of test vectors within the simulation module.
In one embodiment of the present invention, the method replaces the nonfunctioning module with the simulation module. Next, the method compiles the functioning modules and the simulation module into an executable system. The method then executes this executable system to allow testing of the completed modules.
In one embodiment of the present invention, the method tests the executable system with the list of test vectors.
In one embodiment of the present invention, capturing the response of the system specification to the list of test vectors includes capturing an output of the system specification to a specified input test stimulus.
In one embodiment of the present invention, the nonfunctioning module can be identified manually.
In one embodiment of the present invention, the interface for the nonfunctioning module includes input/output and inter-module data transfers.